INTERMEC, INC., INTERMEC TECHNOLOGIES CORP., INTERMEC IP CORP., Appellants v. ALIEN TECHNOLOGY, LLC, Appellee
This appeal arises from an inter partes reexamination of U.S. Patent No. 6,812,841 (“'841 patent”) in Reexamination No. 95/001,265. The examiner rejected claims 1, 7–15, and 25–29 as obvious and the U.S. Patent and Trademark Office, Patent Trial and Appeal Board (“Board”) affirmed those rejections. Appellants Intermec Inc., Intermec Technologies Corp., and Intermec IP Corp. (collectively, “Intermec”) then requested rehearing, which the Board denied. This appeal followed. For the following reasons, we affirm the Board's decision.
The '841 patent relates to radio frequency identification (RFID) tags, also called transponders. Generally speaking, RFID tags fall within one of two types—active or passive. Active tags contain an internal power supply and, thus, function without the aid of external power, signals, or other stimuli. Passive tags, on the other hand, receive their power from RF signals that RFID readers produce when communicating with the tag. The '841 patent specifically addresses passive-type RFID tags. Because passive tags do not include independent power supplies, these devices lose power when the tag exceeds the range of the RF signal powering it. When the tag loses its signal, its memory clears and the RFID reader must repeat commands to restore it to its previous powered state. This restoration process creates inefficiencies and imposes delays in relation to the tag's functionality.
To remedy these drawbacks, the '841 patent includes a “state holding cell” within the tag to allow it to store state information during a loss of power. By including the state holding cell, the tag maintains its present state for a limited time (ideally until at least the tag receives subsequent RF waves from the reader). This allows passive RFID transponders to preserve their state information even if the tag loses its external power supply for a short period of time.
On appeal, Intermec challenges the Board's rejections of various claims on three distinct grounds: (1) claims 1 and 7–15 under § 103 as obvious over U.S. Patent No. 7,248,145 to Littlechild et al. (“Littlechild”) in view of “RFID Handbook Radio-Frequency Identification Fundamentals and Applications” by Klaus Finkenzeller (“Finkenzeller”); (2) claims 25–26 and 28–29 under § 103 as obvious over Littlechild in view of U.S. Patent No. 6,942,155 to Stewart et al. (“Stewart”); and (3) claim 27 under § 103 as obvious over U.S. Patent No. 4,674,618 to Eglise et al. (“Eglise”) in view of Finkenzeller. Appellants' Br. 2. Independent claim 25 is representative:
25. A method for operating an RFID transponder, comprising:
receiving an interrogating RF signal;
recovering analog signals from said received interrogating RF signal and providing state information defining a desired state of said RFID transponder corresponding to said analog signals;
executing at least one command in accordance with said state information;
storing digital data in and retrieving digital data from a memory responsive to said at least one command;
providing electrical power for said RFID transponder derived from said interrogating RF signal;
maintaining said state information in a state holding cell during a temporary lapse in receipt of said interrogating RF signal, wherein said memory and said state holding cell are provided by separate circuit elements.
Although the scope of the rejected claims-at-issue vary, the three grounds of rejection primarily turn on the following disputes: (1) whether the prior art references, in combination, result in a tag that contains a state holding cell that is separate from a non-volatile memory; (2) whether the prior art teaches the recited “state holding cell”; and (3) whether the prior art references, in combination, render the claims obvious, particularly in light of the recited “memory and [a] state holding cell ․ provided by separate circuit elements” claim limitation.
The '841 patent issued on November 2, 2004, consisting of twenty-four claims. As a result of an infringement litigation between Alien and Intermec, Alien requested, and the Patent Office instituted, an inter partes reexamination for claims 1, 7–15, and 21–24 of the '841 patent. Along with its first response to the Patent Office's reexamination determination, Intermec presented newly added claims 25–29. Upon initial examination of the claims, the examiner declared all claims subject to this appeal allowable. Alien appealed, and the Board reversed the examiner and rejected the claims. Although Intermec reopened prosecution to obtain a different result, the examiner ultimately adopted the Board's rejections.
For the first ground (claims 1 and 7–15, Littlechild in view of Finkenzeller), the examiner recognized that Littlechild describes state information stored within a volatile memory (a “mute chip bit”) but that it did not describe another memory provided by separate circuit elements. Finkenzeller discloses that a separate, distinct non-volatile memory was a standard feature of RFID tags as of its 1999 publication, and the examiner determined that it would have been obvious to combine these two references to achieve the claimed the invention. For the second grounds (claims 25–26 and 28–29, Littlechild in view of Stewart), although the examiner recognized that Littlechild does not specifically disclose maintaining state information in a separate holding cell (i.e., provided by separate elements), the examiner found that Stewart disclosed this feature by reciting a “tenacious latch.” For the third and final ground, (claim 27, Eglise in view of Finkenzeller), although the examiner recognized that Eglise does not specifically disclose maintaining the state information in a state holding cell provided by separate circuit elements (as parent claim 25 requires), the examiner observed that Finkenzeller teaches a separate, nonvolatile memory in addition to a temporary memory, and that this memory arrangement existed as a standard feature of RFID tags.
Intermec appealed the examiner's rejections, but the Board affirmed. On rehearing, the Board declined to modify its decision. Intermec timely appealed the Board's decision. We have jurisdiction under 28 U.S.C. § 1295(a)(4)(A) (2012).
We review the Board's legal determinations de novo and its underlying factual determinations for substantial evidence. Rambus Inc. v. Rea, 731 F.3d 1248, 1251 (Fed. Cir. 2013). Obviousness is legal question based on underlying factual findings. In re DBC, 545 F.3d 1373, 1377 (Fed. Cir. 2008).
For the first ground (obviousness of claims 1 and 7–15), Intermec argues that the hypothetical RF tag resulting from the Board's combination of Littlechild and Finkenzeller would result in a tag that contains one nonvolatile memory (including the state information) and a superfluous, unused memory. Moreover, Intermec argues that even if the memory holding the state information equates to the recited state holding cell, the other memory cannot meet the requirements of the claim because the other memory is volatile, rather than non-volatile memory. To that point, Intermec concludes that the combination of these references as the Board proposed would require moving the state information holding function of Littlechild's volatile memory to a non-volatile memory in the hypothetical tag. Put another way, Intermec contends that the Board improperly switched the location of the state bit when proposing its hypothetical combination that resulted in the non-volatile memory storing this bit. Intermec additionally argues that there is no motivation to combine the references in the manner recited in the claims.
We conclude that the Board did not err in its obviousness determination and that substantial evidence supports its factual findings underpinning its conclusions. There is no dispute that Littlechild discloses a volatile memory that stores state information. In particular, Littlechild discloses a “temporary memory” array that stores information in a “mute chip bit.” Littlechild uses the mute chip bit to retain information during the event of a power loss to the tag. Intermec does not contest that this mute chip bit equates to the recited state holding cell. Finkenzeller provides a general handbook on RFID technology that describes various RFID tags and their applications, and discloses the implementation of various types of memory in RFID tags (e.g., EEPROM, FRAM, ROM, RAM). As the examiner correctly observed, Finkenzeller teaches that a separate non-volatile memory in addition to temporary memory was a standard feature of RFID tags of the time. And by adding Finkenzeller's nonvolatile memory to Littlechild's volatile memory containing the mute chip bit, the resulting combination necessarily includes all of the recited elements in the claims. Indeed, Intermec does not appear to dispute this fact.
COURT: I'm just saying, if you do combine [Littlechild and Finkenzeller], you get the invention.
Mr. Jones [counsel for Intermec]: ․ if the combination results in a non-volatile readable, writable memory that is separate and apart from ․ a state holding cell.
COURT: So combining them will do that, right?
Mr. Jones: It would structurally put them together, yes your Honor.
Oral Argument 10:47–11:10, available at http://oralarguments.cafc.uscourts.gov/default.aspx?fl=2015-1808.mp3.
Although Littlechild does not necessarily disclose an additional, separate non-volatile memory, Finkenzeller proposes the use of separate memories within an RFID transponder; each with advantages vis-à -vis the others based on its particular application (e.g., access time, persistence during power loss, costs, etc.). In light of this disclosure, Finkenzeller teaches the benefits of providing separate memories within RFID transponders. Therefore, substantial evidence supports the Board's findings that one of ordinary skill would be motivated to combine these references.1 We therefore conclude that Littlechild in view of Finkenzeller renders the claims obvious. See KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 416 (2007) (observing that the combination of known elements according to known methods yields predictable results and would be a predictable variation). Accordingly, we find that the Board correctly affirmed the examiner's obviousness rejections under the first ground.
Regarding the second ground (obviousness of claims 25–26 and 28–29), Intermec argues that Stewart does not teach a state holding cell but rather a timing circuit that delays, or slows down, certain operations of a device. As Intermec observes, Stewart uses this “tenacious latch” to delay the password-protected destruct sequence of an RF tag. Intermec argues that Stewart cannot consistently or reliably retain state information beyond the time period of the latch's discharge period, because once the capacitor's charge dissipates, the tag cannot maintain information even if the tag has not lost power at that time. Finally, Intermec argues that the latch's capacitor merely represents a binary “1,” but not “0,” thus it cannot store state information by merely representing a single state. Intermec concludes that this deficiency undermines the purpose of the '841 patent and the problem that its inventors solved, i.e., storing the current state of the tag and maintaining that state information during a power loss.
We conclude that substantial evidence supports the Board's findings that Stewart's tenacious latch meets the limitations of the claims under this ground of rejection. The claims-at-issue require “maintaining said state information in a state holding cell during a temporary lapse in receipt of said interrogating RF signal ․” J.A. 3313. Although Stewart teaches employing this latch to slow down the functioning of a circuit in one embodiment, the reference is not so limited. In particular, Stewart teaches employing this latch to retain the state of the device during a disruption in the power supply. See J.A. 618 (Stewart col. 2 ll. 9–11) (“Likewise, it is also important that certain tag states like the SLEEP/WAKE or other command states persist even through short interruptions of the power supply.”). In particular, Stewart expressly discloses applying this latch to electronic devices prone to temporary power losses. “One skilled in the art will recognize that any device that might suffer from a loss of power will benefit from a tenacious storage state or latch.” J.A. 620 (Stewart col. 6 ll. 18–20). Thus, as the Board properly concluded, Stewart's latch similarly maintains state information in a state holding cell because it “enabl[es] a circuit to continue to function in the event of a brief loss of power.” J.A. 11 (citing Stewart col. 2 ll. 29–31); see also, J.A. 620 (Stewart col. 5 ll. 8–11) (disclosing the stabilization of storage nodes). We thus conclude that substantial evidence supports the Board's findings and that it correctly affirmed the examiner's obviousness rejections under this ground as well.
Regarding the third and final ground (obviousness of claim 27), Intermec argues that Eglise discloses storing state information in a single non-volatile memory structure (i.e., EAROM) and that this reference does not disclose a separate memory and a state holding cell. Intermec criticizes the Board's modification of Eglise in view of Finkenzeller which, according to Intermec, would result in an entirely duplicative non-volatile memory that would increase the cost and size of the tag. Intermec additionally argues that this combination is inconsistent with Alien's proposed combination that required storage of the state information in Finkenzeller's volatile memory.
We conclude that the Board did not err in its obviousness determination and that substantial evidence supports the factual findings underpinning its conclusions. Intermec does not dispute that Eglise discloses storing the state information in a single non-volatile memory (i.e., EAROM). Even though Eglise does not specifically disclose maintaining the state information in a state holding cell (where the memory and the state holding cell are provided by separated circuit elements), Finkenzeller discloses the implementation of various types of memory in RFID tags (e.g., EEPROM, FRAM, ROM, RAM). As the examiner properly observed, by combining these known elements according to known methods, it would have been obvious to use a separate element (i.e., Finkenzeller's nonvolatile memory) to perform the already-disclosed function of maintaining the state information during a loss in power in the system disclosed by Eglise. KSR, 550 U.S. at 416. Specifically, with the benefit of Finkenzeller's disclosure, one of ordinary skill in the art would recognize that various memory types conventionally employed within RFID tags each carry particular advantages and disadvantages vis-à -vis the others (e.g., access time, persistence during power loss, costs, etc.). In light of these teachings, substantial evidence supports the Board's underlying factual findings and we conclude that it would have been obvious to store the state information and the operational data in separate memories when maintaining state information during a loss in power. Thus, we conclude that the Board correctly affirmed the examiner's obviousness rejections under this final ground as well.
For the foregoing reasons, we affirm the Board's decision.
1. Intermec raises concerns that the Board improperly transposed the position of the state information in its hypothetical combination (i.e., from Littlechild's volatile memory to the Finkenzeller's non-volatile). Appellants' Br. 18 (citing J.A. 9, 44). Although it appears that both the Board and the examiner set forth some conflicting findings as to where, precisely, the state information would be stored in this hypothetical combination, we consider such misstatements harmless error.
PROST, Chief Judge.